fdb8832_f085 n-channel logi c level po wertrench ? mosfet ?2010 fa irchild semiconductor corporation fdb8832 _f085 r ev. a 1 www.fairchildsemi.com 1 fdb8832_f085 n-channel logic level powertrench ? mosfet 30v, 80a, 2.1m ? features ? typ r ds(on) = 1.5m ? at v gs = 5v, i d = 80a ? typ q g(5 ) = 1 00nc at v gs = 5v ? low miller charge ? low q rr body di ode ? uis capability (single pulse and repetitive pulse) ? qualified to aec q101 ? rohs compliant applications ? 12v automotive load contr ol ? starter / alternator systems ? electronic power steering systems ? abs ? dc-dc converters l e a d f r e e m t a e l n t i o m p e n i may 2010
fdb8832 _f085 re v. a 1 www.fairchildsemi.com 2 electrical characteristics t j = 25c unless otherw i se noted symbol parameter test conditions min typ max units off ch ara cteristics b vdss drain to source breakdow n voltage i d = 250 a, v gs = 0v 30 - - v i dss zero gate voltage drain current v ds = 24v v gs = 0 v - - 1 a t j = 150 c - - 250 i gss gate to source leakage cur rent v gs = 20v - - 100 na on charac te ristics v gs(th) gate to source th reshold voltage v ds = v gs , i d = 250 a 1.0 1.6 3.0 v r on ) drain to sour ce on resistance i d = 80a, v gs = 1 0 v - 1.4 1.9 m ? i d = 80a, v gs = 5 v - 1.5 2.1 i d = 80a, v gs = 4 .5v - 1.6 2.2 i d = 80a, v gs = 10 v t j = 175 c - 2.3 3.0 dynamic ch aracteristics c iss input capacitance v ds = 15v, v gs = 0v, f = 1mhz - 11400 - pf c oss output capacita n ce - 2140 - pf c rss reverse transfe r capa citance - 1260 - pf r g ga te resi stance v gs = 0.5v, f = 1mhz - 1.2 - ? q g(tot) total gate charge at 10v v gs = 0 to 10v v dd = 15v i d = 80a i g = 1 . 0 m a - 204 265 nc q g(5) total gate charge at 5v v gs = 0 to 5v - 100 130 nc q g(th) threshold gate cha r ge v gs = 0 to 1v - 10.9 14.2 nc q gs gate to source gate charge - 33 - nc q gs2 gate charge thr eshold to plateau - 22 - nc q gd gate to drain ?m iller? charge - 43 - nc ds( mosfet maximum ratings t c = 25c unless oth erwise noted thermal characteristics package marking and ordering information symbo l paramet er ratings units v dss drain to s ource voltage 30 v v gs gate to source voltage 20 v i d drain c urre nt continuous (t c < 165 o c, v gs = 10v) 80 a drain c urre nt continuous (t c < 163 o c, v gs = 5v) 80 drain c urre nt continuous (t amb = 25 o c, v gs = 10v, with r ja = 43 o c/w) 34 pulsed s e e figure 4 e as single pulse avalanch e energy (note 1) 1246 mj p d power dissipa tion 300 w der ate above 25 o c2 w/ o c t j , t stg operating and s to rage temperature -55 to +175 o c r jc thermal re sistance, junction to case 0.5 o c/w r ja th e rmal resistance, junction to ambient (note 2) 62 o c/w r ja thermal r esist ance, junction to ambient, lin 2 coppe r pad ar ea 43 o c/w device marking d evice package reel size tape width quantity _f085 24mm 800 units fdb8832 fdb8832 to-263ab 330mm fdb8832 _f085 n-channel logi c level p o wertrench ? mosfe t
fdb8832 _f085 re v. a 1 www.fairchildsemi.com 3 electrical characteristics t j = 25c unless othe rwise noted swit ch ing characteristics drain-source diode characteristics sy mb ol pa rameter test conditions min typ max units t (on) turn-o n t ime v dd = 15v, i d = 80a v gs = 5 v , r gs = 1.5 ? --1 5 5ns t d(on ) turn -o n delay time - 24 - ns t r turn -o n rise time - 73 - ns t d(of f) turn-o ff del ay time - 54 - ns t f turn-off fa ll time - 38 - ns t off turn-off ti me - - 149 ns v sd so urce to dr ain diode voltage i sd = 75a - 0 .8 1.25 v i sd = 40a - 0 .8 1.0 v t rr reverse recover y time i f = 75a, di/dt = 100a/ s - 5 9 77 ns q rr reverse recover y charge i f = 75a, di/dt = 100a/ s - 6 7 87 nc notes : 1: starting t j = 25 o c, l = 0.61mh, i as = 64a, v dd = 30v , v gs = 10v. 2: puls e width = 100s. this product ha s been designed to m eet the extreme test conditio ns and environment demanded by the automotive industry. for a copy of the requirements, see aec q101 at: http://www.aecouncil.com/ all fairchild semiconductor products ar e manufactured, assembled and tested under iso9000 and qs9000 quality systems certification. fdb8832 _f085 n-channel logi c level p o wertrench ? mosfe t
fdb8832 _f085 re v. a 1 www.fairchildsemi.com 4 typical characteristics fi gu re 1. normalized power dissipation vs case temperature 0 25 5 0 75 100 125 150 175 0.0 0.2 0.4 0.6 0.8 1.0 1.2 pow er dissipation muliplier t c , c a se temperature ( o c ) figu re 2. 25 50 75 100 125 150 175 0 50 100 150 200 250 300 350 i d , d rai n current (a) t c , c a se temperature ( o c ) v gs = 10 v v gs = 5v curr e nt limited by package maximum co ntinu ous drain current vs case temperature figure 3. 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 1e-3 0.01 0.1 1 sin g le pulse d = 0 . 50 0.20 0.10 0.05 0.02 0.01 normalized thermal impedance, z jc t, re ctangular pulse duration(s) duty cycle - descending order 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc x r jc + t c p dm t 1 t 2 norm alize d maximum transient thermal impedance figure 4. peak current capability 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 100 1000 10 000 tr a nsconductance may limit current in this region v gs = 10 v sin g le pulse i dm , peak cu rr ent (a) t, r ectangular pulse duration(s) t c = 25 o c i = i 25 175 - t c 150 for temper atures above 25 o c dera te peak curr en t as follows: fdb8832 _f085 n-channel logi c level p o wertrench ? mosfe t
fdb8832 _f085 re v. a 1 www.fairchildsemi.com 5 figure 5. 11 0 0.1 1 10 100 1000 lim i ted by package 60 4000 10u s 100us 1ms 10m s i d , dr ai n current (a) v ds , dra i n to source voltage (v) op er ation in this area may be limited by r ds( o n) sin g le pulse t j = max rated t c = 25 o c dc for ward bias safe operating area 0.01 0.1 1 10 100 1000 1 10 100 500 5000 sta r ting t j = 15 0 o c star ting t j = 25 o c i as , a v alanche current (a) t av , tim e in avalanche (ms) t av = (l)(i as )/(1. 3*rated bv dss - v dd ) if r = 0 if r 0 t av = (l/ r)l n[(i as *r)/(1 . 3*rated bv dss - v dd ) +1] note: refe r t o fairchild application notes an7514 and an7515 figure 6 . unclamped inductive switching c apability figure 7. 01234 0 50 100 150 200 t j = -5 5 o c t j = 25 o c t j = 17 5 o c pulse dura t ion = 80 s dut y cycle = 0.5% max v dd = 5v i d , dra i n current (a) v gs , ga t e to source voltage (v) tr an sfer characteristics figure 8. 0.0 0.5 1.0 1 .5 0 50 10 0 150 200 v gs = 5v i d , d ra in current (a) v ds , dra i n to source voltage (v) v gs = 3v v gs = 3. 5v v gs = 10 v pulse d uration = 80 s duty cycl e = 0.5% max sa turation characteristics fi gure 9. 2468 1 0 0 1 2 3 4 r ds ( on) , dra in to source on-resistance ( m ? ) v gs , ga t e to source voltage ( v ) t j = 25 o c t j = 17 5 o c pul se d uration = 80 s dut y cy cle = 0.5% max drain to so urce on-res i stance variation vs gate to source voltage figure 10. -80 - 40 0 40 80 120 160 200 0.6 0.8 1.0 1.2 1.4 1.6 t j , j unct ion temperature ( o c ) normalized dra in to source on-resistance i d = 80 a v gs = 10v pulse dura t ion = 80 s duty cycle = 0.5% max norm alized drain to source on resistance vs junction temperature typical characteristics fdb8832 _f085 n-channel logi c level p o wertrench ? mosfe t
fdb8832 _f085 re v. a 1 www.fairchildsemi.com 6 figu re 11. -80 - 40 0 40 80 120 160 200 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 norm al ized gate threshold voltage t j , j unct ion temperature ( o c ) v gs = v ds i d = 250 a normalized gate thre shold voltage vs junction temperature figure 12. normalized drain to source breakdown voltage vs junction temperature -80 - 40 0 40 80 120 160 200 0.90 0.95 1.00 1.05 1.10 t j , j unct ion temperature ( o c ) normalized drain t o source breakdown voltage i d = 25 0 a figu re 13 . 0.1 1 10 100 100 0 10 000 c iss c oss c rss f = 1 m hz v gs = 0v cap aci tance (pf) v ds , dra i n to source voltage ( v ) 50 40000 capa citanc e vs drain to source voltage figure 14. 0 50 1 00 150 200 250 0 2 4 6 8 10 v dd = 12v v dd = 18 v v dd = 15v i d = 80 a q g , ga te charge(nc) v gs , gate t o source voltage(v) gate charg e vs gate to source voltage typical characteristics fdb8832 _f085 n-channel logi c level p o wertrench ? mosfe t
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